The invention generally relates to semiconductor manufacturing and integrated circuits and, more particularly, to circuits and methods of fabricating circuits that provide electrostatic discharge protection, as well as methods of protecting an integrated circuit from electrostatic discharge.
An integrated circuit may be exposed to electrostatic discharge (ESD) events that can direct potentially large and damaging ESD currents to the integrated circuits of the chip. An ESD event involves an electrical discharge from a source, such as the human body or a metallic object, over a short duration and can deliver a large amount of current to the integrated circuit. An integrated circuit may be protected from ESD events by, for example, incorporating an ESD protection circuit into the chip. If an ESD event occurs, the ESD protection circuit triggers a power clamp device, such as a silicon-controlled rectifier, to enter a low-impedance, conductive state that directs the ESD current to ground and away from the integrated circuit. The ESD protection device holds the power clamp device in its conductive state until the ESD current is drained and the ESD voltage is discharged to an acceptable level.
Improved circuits and methods of fabricating circuits that provide electrostatic discharge protection, as well as improved methods of protecting an integrated circuit from electrostatic discharge, are needed.